I am a PhD alumnus of the Department of Electrical and Computer Engineering at the University of Maryland . I graduated in late 2015, and took a temporary position at SecondWrite LLC before settling at Intel. At Intel, I work on the software/compiler side of next-generation supercomputing architecture research and development.
During grad school I was funded by a NASA Space Technology Research Fellowship , advised by Dr. Rajeev Barua . Research areas which I find interesting include parallel computing, compilers, and operating systems.
Transparently space sharing a multicore among multiple processes (DOI 10.1145/3001910) Timothy Creech and Rajeev Barua ACM Transactions on Parallel Computing (TOPC) 3, no. 3 (2016): 17.
Affine Parallelization using Dependence and Cache analysis in a Binary Rewriter (DOI 10.1109/TPDS.2014.2349501) Aparna Kotha, Kapil Anand, Timothy Creech, Khaled ElWazeer, Matthew Smithson, Greeshma Yellareddy, Rajeev Barua IEEE Transactions on Parallel and Distributed Systems (TPDS), August 2014.
Affine Parallelization of Loops with Run-time Dependent Bounds from Binaries (DOI 10.1007/978-3-642-54833-8_29) Aparna Kotha, Kapil Anand, Timothy Creech, Khaled Elwazeer, Matthew Smithson, Rajeev Barua 23rd European Symposium on Programming (ESOP'14), Grenoble, France. April 2014. Acceptance rate: 24% (27/109)
Efficient Multiprogramming for Multicores with SCAF (abstract) (DOI 10.1145/2540708.2540737) Timothy Creech, Aparna Kotha, Rajeev Barua IEEE/ACM International Symposium on Microarchitecture (MICRO'13), Davis, CA. December 2013. Acceptance rate: 16% (39/239)
This space holds useful things for classes I helped with as a TA.
A public version of my resume is available here .
I can be contacted via email at firstname.lastname@example.org .